? data device corporation 105 wilbur place bohemia, new york 11716 631-567-5600 fax: 631-567-7358 www.ddc-web.com for more information contact: technical support: 1-800-ddc-5757 ext. 7382 features ? low cost pin-for-pin replacement for sdc-630/632/634 series. for all new designs. industry standard low profile modular converters accuracy: 10 bit: 21 minutes 12 bit: 8.5 minutes 14 bit: 4 minutes, 0.9 lsb or 2.6 minutes (high accuracy) options (consult factory): velocity input bit: built-in-test 16-bit resolution description the sdc-630/632/634 a/st series are low cost, low profile synchro- to-digital (s/d) and resolver-to-digital (r/d) tracking converters with standard pin configurations. they use a unique control transformer algorithm that provides inherently higher accuracy and jitter-free out- put. utilizing a type ii servo loop, these converters have no velocity lag up to the specified tracking rate, and output data is always fresh and continuously available. each unit is fully trimmed and requires no adjustment or field calibration. applications these converters may be used wherever analog angle data from a synchro or resolver must be rapidly and accurately converted to digi- tal form for transmission, storage or analysis. because these units are extremely rugged and stable, and meet the requirements on mil- std-202e, they are suitable for the most severe industrial, commer- cial and military applications. military ground support and avionics uses include ordnance control, radar tracking systems, navigation and collision avoidance systems. sdc-630/632/634* a/st 10-, 12-, or 14-bit synchro-to-digital/ resolver-to-digital converter make sure the next card you purchase has... ? 1993, 1999 data device corporation all trademarks are the property of their respective owners. * patented
2 data device corporation www.ddc-web.com sdc-630/632/634 a/st e-12/02-300 figure 1. sdc-630/632/634 a/st block diagram scott-t solid state solid state scott-t resolver transformer buffer buffer resolver resolver input option (a) resolver input option (st) synchro input option (a) synchro input option (st) s1 sin sin sin sin bit 1 bit 1 (msb) bit 10, 12, or 14 (lsb) bit 10, 12 or 14 rh ref rl sin sin sin cos cos t cos cos input reference (a) vel velocity (optional) inh inhibit cb converter busy resistor (st) divider input options solid state controlled oscillator voltage and processor error isolation control up-down counter (contains angle ) (ct) transformer transformer demodulator option cos cos ( ( ? ) ? ) s1 s1 s1 s2 s2 s2 s2 s3 s3 s3 s3 s4 s4 isolation transformer
3 data device corporation www.ddc-web.com sdc-630/632/634 a/st e-12/02-300 table 1. sdc-630/632/634 a/st specifications parameter value sdc-630 sdc-632 sdc-634 resolution 10 bits 12 bits 14 bits accuracy standard units high accuracy option 21 min ? 8.5 min ? 5.3 min 2.6 min signal and reference input synchro input 90v l-l, 400 hz (option h) 90v l-l, 60 hz (option i) 11.8v l-l, 400 hz (option l) resolver input 90v l-l, 400 hz (option h) 26v l-l, 60 hz (option m) 11.8v l-l, 400 hz (option l) signal frequency range 350-1000 hz 47-1000 hz 350-1000 hz 350-1000 hz 350-1000 hz 350-1000 hz signal input impedance (l-l balanced, resistive) a* st 148 k ? min 148 k ? min 19 k ? min 148 k ? min 42 k ? min 19 k ? min 123 k ? 123 k ? 52 k ? ? ? 70 k ? reference input options h, i options m, l reference voltage range reference input impedance (resistive) 40-150 vrms 10-50 vrms 300 k ? min 80 k ? min 270 k ? 60 k ? *transformer isolated. other voltages and frequencies available on special order. digital input/outputs logic type inhibit input (inh) outputs type 10, 12, 14, (for 16 consult factory) parallel data bits converter busy (cb) drive capability built-in-test (bit) (special order, consult factory) ttl/cmos compatible logic ?0? inhibits does not interrupt converter tracking. ttl/cmos natural binary angle; positive logic 0.5 to 1.5 sec positive pulse. data changes on leading edge. 1 std. ttl load velocity output (special order) polarity std. voltage range (full scale) scaling option h, l option i positive output for increasing angle 4 min (other ranges available; consult factory) 0.6 v per rps (nominal) 10 v = 15 rps 3.3 v per rps (nominal) 10 v = 2.7 rps table 1. sdc-630/632/634 a/st specifications (contd) parameter value power supplies nominal voltage range maximum voltage without damage current (all) +15 v supply -15 v supply +5 v supply +11 to +16.5 v +18 v 20 ma -11 to -16.5 v -18 v 25 ma +4.5 to +5.5 v +7 v 10 ma temperature ranges operating -1 option -3 option storage -55c to +105c 0c to +70c -55c to +125c physical characteristics size (encapsulated module) weight 3.125 x 2.625 x 0.43 inches (7.94 x 6.67 x 1.07 cm) 4 oz (113 gm.) note: these specifications apply over temperature range, power supply range, reference frequency and amplitude range, 10% signal amplitude varia- tion, and up to 10% harmonic distortion in reference input. power supplies the main power supplies can vary over the specified ranges with no change in converter specifications, except for a proportional change in maximum tracking rates. when testing or evaluating the converters, it is advisable to limit the current in each of the supplies. set each current limit 50% greater than the maximum current listed for that supply as listed in table 1. timing figure 2 shows the converter timing waveforms. whenever an input angle change occurs, the converter changes the digital angle in 1 lsb steps, and generates a converter busy (cb) pulse. the cb is a positive pulse 0.5 to 1.5 sec long. data changes on the leading edge of the cb pulse, and data can be transferred 0.5 sec after the leading edge. data valid 6.1 s min depends on d dt 0.5-1.5 s .5 s data valid inhibit (inh) "1" "0" converter busy (cb) "1" "0" figure 2. sdc-630/632/634 a/st timing diagram
4 data device corporation www.ddc-web.com sdc-630/632/634 a/st e-12/02-300 the simplest method of interfacing with a computer is to transfer data at a fixed time interval after the inhibit is applied. the con- verter will ignore an inhibit during the ?busy? interval until that interval is over. timing is as follows: (a) apply the inhibit, (b) wait 0.5 sec, (c) transfer the data, (d) release the inhibit. the inhibit line has no effect on converter tracking. signal inputs to prevent damage to the inputs, the maximum steady-state volt- age should not exceed the specified input voltage by more than 30%. accommodating non-standard input voltages (a only) the signal and reference input levels can be resistively scaled to accommodate non-standard voltages, see figure 3. select a converter that is the next lower standard voltage, and the voltage is then scaled up by using resistors in series with the synchro and/or reference inputs. for a synchro input (sdc), a resistor r sig is added in series with s1, s2 and s3 which is determined as follows: r sig = 1.1k (new l-l voltage ? standard unit l-l voltage) that is, 1.1k for each volt above the design voltage level of the standard unit. example: an sdc-634a-l (11.8 v) is to be used at 50 v l-l. r sig = 1.1k (50 ? 11.8) = 42.2k the closest available high grade resistor with a low temperature coefficient of resistance should be used, and the three resistors should be as closely matched to each other as possible. in gen- eral, a 0.1% difference will introduce 1.7 arc minutes of addition- al error due to the effect on sin/cos ratio relationship. the absolute value of the resistor is not critical. in the case of the resolver version (rdc), the equation is: r sig = 2.2k (new l-l voltage ? standard unit l-l voltage) the calculated resistors are connected in series with s1 and s2 respectively. note only two resistors are required. the required resistance matching and its effect on accuracy, is the same as for a synchro input, see figure 3. the reference voltage is treat- ed in the same manner, but the value is not critical. r ref = 2.8k (new reference ? standard reference) for this use a 10% tolerance resistor is adequate. table 2. sdc-630/632/634 a/st dynamic characteristics bandwidth (non f carrier) carrier frequency range bandwidth (closed loop) ka a1 a2 a b 60 hz 400 hz units 47 - 1,000 15 1,100 0.1 7,600 33 16.3 360 - 1,000 (st to 5,000) 100 48,000 1 48,000 220 110 hz hz 1/s 1/s 1/s 1/s 1/s resolution 10 12 14 16 10 12 14 16 units tracking rate (rps) typical minimum acceleration (1 lsb lag) settling time (179 step, max) 28.5 24 370 500 7.1 6 93 600 1.8 1.5 23 900 0.45 0.37 5.8 2,200 192 160 17,000 90 48 40 4,220 100 12 10 1,050 140 3 2.5 260 320 rps rps /s 2 msec { nonstandard line-to-line level sdc-630a nonstandard reference level r s1 s2 s3 r r r sig ref sig sig { figure 3. sdc-630/632/634 a/st non-standard input level scaling
5 data device corporation www.ddc-web.com sdc-630/632/634 a/st e-12/02-300 14 lsb vel 13 0.015 0.002 0.015 0.01 0.01 0.01 (min) dia (typ) (max) (typ) (tol noncum) 0.01 + + + + + + + - - - - - - - + 12 s4 11 s3 10 sdc-630a/st or sdc-632a/st or sdc-634a/st 2.625 (66.68) 3.125 (79.38) 0.26 (6.604) 0.21 (5.334) 2.2 (55.88) 0.25 (6.35) 0.430 (10.92) 0.040 (1.02) 0.20 (5.08) bottom view side view s2 9 s1 8 cb 7 inh 6 +15v 5 gnd 4 -15v 3 +5v 2 rl 1 msb rh dimensions are in inches (mm). note: vel is not present on the standard product. for vel output contact factory. figure 4. sdc-630/632/634 a/st mechanical outline
6 data device corporation www.ddc-web.com sdc-630/632/634 a/st e-12/02-300 ordering information xxx -xxx -x-x-x-x-x reliability grade: r = enhanced reliability * accuracy: a = high accuracy version, 2.6 minutes (sdc-634 only) temperature range: 1 = -55c to +105c 3 = 0c to +70c signal input voltage and frequency: h = 90 v l-l , 400 hz (synchro or resolver) i = 90 v l-l , 60 hz (synchro only) l = 11.8 v l-l , 400 hz (synchro or resolver) transformer type: a = internal transformer st = solid state resolution: 636 = 16 bits, consult factory 634 = 14 bits 632 = 12 bits 630 = 10 bits input type: sdc = synchro rdc = resolver notes: * r version only available in -55c to 105c temperature range (option 1) for versions with velocity or built-in-test, please consult factory.
7 data device corporation www.ddc-web.com sdc-630/632/634 a/st e-12/02-300 notes
8 e-12/02-300 printed in the u.s.a. the information in this data sheet is believed to be accurate; however, no responsibility is assumed by data device corporation for its use, and no license or rights are granted by implication or otherwise in connection therewith. specifications are subject to change without notice. 105 wilbur place, bohemia, new york, u.s.a. 11716-2482 for technical support - 1-800-ddc-5757 ext. 7382 headquarters, n.y., u.s.a. - tel: (631) 567-5600, fax: (631) 567-7358 southeast, u.s.a. - tel: (703) 450-7900, fax: (703) 450-6610 west coast, u.s.a. - tel: (714) 895-9777, fax: (714) 895-4988 united kingdom - tel: +44-(0)1635-811140, fax: +44-(0)1635-32264 ireland - tel: +353-21-341065, fax: +353-21-341568 france - tel: +33-(0)1-41-16-3424, fax: +33-(0)1-41-16-3425 germany - tel: +49-(0)8141-349-087, fax: +49-(0)8141-349-089 japan - tel: +81-(0)3-3814-7688, fax: +81-(0)3-3814-7689 world wide web - http://www.ddc-web.com data device corporation registered to iso 9001 file no. a5976 r e g i s t e r e d f i r m ? u
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